Document Text Contents
Page 57
6.2 Refresh Controller
Functions
The refresh controller can be used for one of three functions: DRAM refresh control, pseudo-
static RAM refresh control, or as an interval timer.
Features
• Functions as a DRAM refresh controller
— Enables direct connection of 16-bit-wide DRAM
— Selection of 2CAS or 2WE mode
— Selection of 8-bit or 9-bit column address multiplexing for DRAM address input
— CAS-before-RAS refresh control
— Software-selectable refresh interval
— Software-selectable self-refresh mode
— Wait states can be inserted
• Functions as a pseudo-static RAM refresh controller
— RFSH signal output for refresh control
— Software-selectable refresh interval
— Software-selectable self-refresh mode
— Wait states can be inserted
• Functions as an interval timer
— Refresh timer counter (RTCNT) can be used as an 8-bit up-counter
— Selection of seven counter clock sources: ø/2, ø/8, ø/32, ø/128, ø/512, ø/2048, ø/4096
— Interrupts can be generated by compare match between RTCNT and the refresh time
constant register (RTCOR)
58
Page 58
DRAM Refresh Control: The following diagrams show the interface timing for 2CAS
DRAM and an interface circuit for 2WE DRAM.
DRAM Control Signal Output Timing (2CAS Mode)
An example of an interconnection to 2WE 4-Mbit DRAM is shown next.
Interconnections for 2WE 4-Mbit DRAM (Example in Expanded 16-Mbyte Mode)
CS3 (RAS)
ø
Read cycle Write cycle* Refresh cycle
Address bus Row Column Row Column Area 3 top address
Note: * 16-bit access
HWR (UCAS)
LWR (LCAS)
RD (WE)
RFSH
AS
A7
A6
A5
A4
A3
A2
A1
A0
A9
A8
A8
A7
A6
A5
A4
A3
A2
A1
A18
A17
RAS
CAS
UW
LW
OE
CS3
RD
HWR
LWR
D15 to D0 I/O15 to I/O0
2WE 4-Mbit DRAM
with × 16-bit organization,
H8/3048
Series
10-bit row address × 8-bit
column address
59
Page 113
• E7000 graphical interface software
— Source-level debug
Displays position (PC) where execution stopped in source program
Displays contents of selected variables in source program
Breakpoint setting on selected line in source program
Supports source-program line-mode (step-mode) execution
— Realtime display of trace information
Displays trace information using source program
Waveform display of address bus, data bus, interrupt signals, external probe signals, etc.
— Multiple windows
Connected display of base frame and subframes (example: if register subframe is
displayed and program is executed in step mode, register contents display is updated)
Easy operation by command subframe
Base Frame of Graphical Interface (Start-Up Window)
FILE EXECUTION TRACE VIEW HELP
H8/300H E7000 Graphical User Interface
Filename: a.c Topline: 1 Endline: 12
#define A SZ 6
inta[A SZ];
main()
{
int i;
for (i=0; i<A SZ;i )
a[i]=0;
proc (a);
}
void proc (a)
int a[ ];
{
DISPLAY STEP OVER STEP CONTINUE SET CLEAR STOP
PC=000040 line: 6
PC>
BP
Source file information
Menu buttons
Source display
Command buttons
Emulation information
Emulator dialogue box:
PC:
BP:
+ +
input on
command line
and display
of command
results
Source line
indicated
by current
PC value
Source line
on which
breakpoint
is set
114
Page 114
H8/300H Series Compact Evaluation Board
• Makes all H8/300H Series functions available to the user
• Supports realtime emulation (Max. 18 MHz)
• EPROM socket for emulating on-chip ROM
• On-chip ROM can also be emulated in emulation RAM
• Firmware mapped independently of user address space
— The entire address space is available to the user
• Built-in terminal interface (RS-232C interface)
— Supports data transfer with host computer
• Allows battery backup of emulation memory (by external battery)
• Target system connectors
— Special 100-pin connector
— Can connect via special adapter board to E7000 emulator’s user cable
H8/300H Series Compact Evaluation Board
95.0
7
4
.0
Firmware
EPROM
H
N
2
7
C
1
0
2
4
Reset switchBreak switch
RS-232C interface
Evaluation chip
(100-pin in-circuit connector) (Unit: mm)
2
7
.0
E
m
u
la
tio
n
R
A
M
E
m
u
la
tio
n
R
A
M
115
6.2 Refresh Controller
Functions
The refresh controller can be used for one of three functions: DRAM refresh control, pseudo-
static RAM refresh control, or as an interval timer.
Features
• Functions as a DRAM refresh controller
— Enables direct connection of 16-bit-wide DRAM
— Selection of 2CAS or 2WE mode
— Selection of 8-bit or 9-bit column address multiplexing for DRAM address input
— CAS-before-RAS refresh control
— Software-selectable refresh interval
— Software-selectable self-refresh mode
— Wait states can be inserted
• Functions as a pseudo-static RAM refresh controller
— RFSH signal output for refresh control
— Software-selectable refresh interval
— Software-selectable self-refresh mode
— Wait states can be inserted
• Functions as an interval timer
— Refresh timer counter (RTCNT) can be used as an 8-bit up-counter
— Selection of seven counter clock sources: ø/2, ø/8, ø/32, ø/128, ø/512, ø/2048, ø/4096
— Interrupts can be generated by compare match between RTCNT and the refresh time
constant register (RTCOR)
58
Page 58
DRAM Refresh Control: The following diagrams show the interface timing for 2CAS
DRAM and an interface circuit for 2WE DRAM.
DRAM Control Signal Output Timing (2CAS Mode)
An example of an interconnection to 2WE 4-Mbit DRAM is shown next.
Interconnections for 2WE 4-Mbit DRAM (Example in Expanded 16-Mbyte Mode)
CS3 (RAS)
ø
Read cycle Write cycle* Refresh cycle
Address bus Row Column Row Column Area 3 top address
Note: * 16-bit access
HWR (UCAS)
LWR (LCAS)
RD (WE)
RFSH
AS
A7
A6
A5
A4
A3
A2
A1
A0
A9
A8
A8
A7
A6
A5
A4
A3
A2
A1
A18
A17
RAS
CAS
UW
LW
OE
CS3
RD
HWR
LWR
D15 to D0 I/O15 to I/O0
2WE 4-Mbit DRAM
with × 16-bit organization,
H8/3048
Series
10-bit row address × 8-bit
column address
59
Page 113
• E7000 graphical interface software
— Source-level debug
Displays position (PC) where execution stopped in source program
Displays contents of selected variables in source program
Breakpoint setting on selected line in source program
Supports source-program line-mode (step-mode) execution
— Realtime display of trace information
Displays trace information using source program
Waveform display of address bus, data bus, interrupt signals, external probe signals, etc.
— Multiple windows
Connected display of base frame and subframes (example: if register subframe is
displayed and program is executed in step mode, register contents display is updated)
Easy operation by command subframe
Base Frame of Graphical Interface (Start-Up Window)
FILE EXECUTION TRACE VIEW HELP
H8/300H E7000 Graphical User Interface
Filename: a.c Topline: 1 Endline: 12
#define A SZ 6
inta[A SZ];
main()
{
int i;
for (i=0; i<A SZ;i )
a[i]=0;
proc (a);
}
void proc (a)
int a[ ];
{
DISPLAY STEP OVER STEP CONTINUE SET CLEAR STOP
PC=000040 line: 6
PC>
BP
Source file information
Menu buttons
Source display
Command buttons
Emulation information
Emulator dialogue box:
PC:
BP:
+ +
input on
command line
and display
of command
results
Source line
indicated
by current
PC value
Source line
on which
breakpoint
is set
114
Page 114
H8/300H Series Compact Evaluation Board
• Makes all H8/300H Series functions available to the user
• Supports realtime emulation (Max. 18 MHz)
• EPROM socket for emulating on-chip ROM
• On-chip ROM can also be emulated in emulation RAM
• Firmware mapped independently of user address space
— The entire address space is available to the user
• Built-in terminal interface (RS-232C interface)
— Supports data transfer with host computer
• Allows battery backup of emulation memory (by external battery)
• Target system connectors
— Special 100-pin connector
— Can connect via special adapter board to E7000 emulator’s user cable
H8/300H Series Compact Evaluation Board
95.0
7
4
.0
Firmware
EPROM
H
N
2
7
C
1
0
2
4
Reset switchBreak switch
RS-232C interface
Evaluation chip
(100-pin in-circuit connector) (Unit: mm)
2
7
.0
E
m
u
la
tio
n
R
A
M
E
m
u
la
tio
n
R
A
M
115
