##### Document Text Contents

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(2) In order to compute Kp-trans , Kp-steady obtained in step 1 should be adjusted until a higher

bandwidth is achieved with additional 10%-20% of the switching frequency. For example, if the

design in step 1 result in a closed loop with 8% bandwidth , Kp-trans is selected in order to have

20% bandwidth.

(3) In order to compute Ki-trans , Ki-steady obtained in step 1 should be adjusted until the low

frequency loop gain is increased by 20%-30%.

(4) The threshold voltage, Vthr , should be selected to be larger than that of the output voltage

ripple of the power converter with a safe margin. A suitable value for Vthr is twice the output

voltage ripple.

(5) The values of Kp-trans, Ki-trans and Vthr are used in Eq. (3.3) and Eq. (3.4). These are the only

three values that need to be predetermined for the AD-PID since Verror-peak and verror(n) values are

dynamically and adaptively detected during the operation.

(6) It should be noted that the PID with Kp-trans and Ki-trans may not be stable in steady state (as

will be shown in the next section) and cannot be used to replace the original conventional PID

with Kp-steady , Ki-steady . The Kp-trans and Ki-trans values are only used during the transients by Eq.

(3.3) and Eq. (3.4) and based on Figure. 3.6 AD-PID controller algorithm.

The Kp-trans and Ki-trans values selected based on the above design guidelines should satisfy the

following theoretical restrictions.

(1) The selected Kp-trans and Ki-trans should not make the loop bandwidth more than half the

switching frequency. While the Kp-trans and Ki-trans values can be selected such that the bandwidth

is close to half the switching frequency, they should be selected such that the AD-PID bandwidth

during dynamic transients is less than half the switching frequency with a sufficient safety

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margin to account for component non-idealities, modeling errors, linearization errors of transfer

functions among others.

(2) The selected Kp-trans and Ki-trans values should result in negative closed loop poles in the s-

plane or closed loop poles inside the unit circle in the z-plane.

It should be noted that for the same power converter, there are several possible conventional

(not adaptive) compensator designs, and this affects the coefficients selection of the AD-PID and

its performance.

Based on the above design guidelines and the power stage design given in Section 5 next,

first, a conventional PID controller is designed with 4.5625p steadyK , 0.078125i steadyK and

1.015625d steadyK to yield a bandwidth of 29KHz and a phase margin of

0

45 . The switching

frequency used is 350KHz. The value of Kp-trans is selected to be 8.46875 to yield an additional

~12% bandwidth. The value of Ki-trans is selected to be 0.218125 to yield a 20% increase in the

low frequency gain from 53dB to 64 dB. The value of Vthr is selected to be 16.2mV, which is

twice the ripple voltage. The selected Kp-trans and Ki-trans values result in a system bandwidth of

70KHz (during transients) which is below the half of switching frequency limit. In Figure. 3.2(c)

shown earlier in this chapter, the bode-plot with lowest bandwidth represent the bode-plot with

Kp-steady and Ki-steady values, and the bode-plot with highest bandwidth is the bode-plot with Kp-trans

and Ki-trans values. Table I summarizes the values of different parameters used in the

implementation of PID compensator and AD-PID controller algorithm in this chapter. With these

values, Eq. (3.3) and Eq. (3.4) now become Eq. (3.5) and Eq. (3.6), respectively.

53

(2) In order to compute Kp-trans , Kp-steady obtained in step 1 should be adjusted until a higher

bandwidth is achieved with additional 10%-20% of the switching frequency. For example, if the

design in step 1 result in a closed loop with 8% bandwidth , Kp-trans is selected in order to have

20% bandwidth.

(3) In order to compute Ki-trans , Ki-steady obtained in step 1 should be adjusted until the low

frequency loop gain is increased by 20%-30%.

(4) The threshold voltage, Vthr , should be selected to be larger than that of the output voltage

ripple of the power converter with a safe margin. A suitable value for Vthr is twice the output

voltage ripple.

(5) The values of Kp-trans, Ki-trans and Vthr are used in Eq. (3.3) and Eq. (3.4). These are the only

three values that need to be predetermined for the AD-PID since Verror-peak and verror(n) values are

dynamically and adaptively detected during the operation.

(6) It should be noted that the PID with Kp-trans and Ki-trans may not be stable in steady state (as

will be shown in the next section) and cannot be used to replace the original conventional PID

with Kp-steady , Ki-steady . The Kp-trans and Ki-trans values are only used during the transients by Eq.

(3.3) and Eq. (3.4) and based on Figure. 3.6 AD-PID controller algorithm.

The Kp-trans and Ki-trans values selected based on the above design guidelines should satisfy the

following theoretical restrictions.

(1) The selected Kp-trans and Ki-trans should not make the loop bandwidth more than half the

switching frequency. While the Kp-trans and Ki-trans values can be selected such that the bandwidth

is close to half the switching frequency, they should be selected such that the AD-PID bandwidth

during dynamic transients is less than half the switching frequency with a sufficient safety

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54

margin to account for component non-idealities, modeling errors, linearization errors of transfer

functions among others.

(2) The selected Kp-trans and Ki-trans values should result in negative closed loop poles in the s-

plane or closed loop poles inside the unit circle in the z-plane.

It should be noted that for the same power converter, there are several possible conventional

(not adaptive) compensator designs, and this affects the coefficients selection of the AD-PID and

its performance.

Based on the above design guidelines and the power stage design given in Section 5 next,

first, a conventional PID controller is designed with 4.5625p steadyK , 0.078125i steadyK and

1.015625d steadyK to yield a bandwidth of 29KHz and a phase margin of

0

45 . The switching

frequency used is 350KHz. The value of Kp-trans is selected to be 8.46875 to yield an additional

~12% bandwidth. The value of Ki-trans is selected to be 0.218125 to yield a 20% increase in the

low frequency gain from 53dB to 64 dB. The value of Vthr is selected to be 16.2mV, which is

twice the ripple voltage. The selected Kp-trans and Ki-trans values result in a system bandwidth of

70KHz (during transients) which is below the half of switching frequency limit. In Figure. 3.2(c)

shown earlier in this chapter, the bode-plot with lowest bandwidth represent the bode-plot with

Kp-steady and Ki-steady values, and the bode-plot with highest bandwidth is the bode-plot with Kp-trans

and Ki-trans values. Table I summarizes the values of different parameters used in the

implementation of PID compensator and AD-PID controller algorithm in this chapter. With these

values, Eq. (3.3) and Eq. (3.4) now become Eq. (3.5) and Eq. (3.6), respectively.